Semiconductor Engineering

Advancing The CFET-Based Device Roadmap: Novel Integration Modules And Standard Cell Configurations

Pioneering work in developing CFET-critical modules: an improved backside contact module and a novel gate stack for threshold ...
Semiconductor Engineering

Research Bits: Sep. 1

Researchers from the Massachusetts Institute of Technology (MIT), Georgia Tech, and Penn State University embedded gallium ...
Semiconductor Engineering

Cassie Sheng

Cassie Sheng is an R&D process integration engineer at imec, Belgium, where she has been working since 2023. She received her ...
Semiconductor Engineering

Trust, But Verify

We trust designers to do the best they can, but know they cannot be perfect. That's why we verify. When AI gets involved, it ...
Semiconductor Engineering

Photonics Forces A Chiplet Rethink

Thermal drift, stress, electromagnetic coupling, and verification gaps are turning optical integration into a full-system co-design problem rather than a plug-in bandwidth upgrade.
Semiconductor Engineering

Hybrid HBM-HBF Architecture in LLM Inference (University of Oxford)

Researchers at the University of Oxford published a technical paper titled “Hardware-Managed Heterogeneous High-Bandwidth ...
Semiconductor Engineering

Cycle-Level Simulator for Distributed GPUs For AI Workloads (Purdue)

Researchers from Purdue University published a technical paper titled “Architecting the Next Generation of Asynchronous, ...
Semiconductor Engineering

Molecular Dynamics Study Explains Aluminum Dopant Activation In 4H-SiC (TU Wien, Silvaco)

Researchers from TU Wien and Silvaco Europe published a technical paper titled “The influence of implantation conditions on ...
Semiconductor Engineering

Programmable Silicon Photonics Filter Enables Continuous Laser Wavelength Tuning (UiT, Stanford)

Researchers at UiT The Arctic University of Norway and Stanford University published a technical paper titled “Intracavity ...
Semiconductor Engineering

Predicting Post-Route PPA from Macro and Standard-Cell Placements (U. of Alberta)

Researchers from University of Alberta published a technical paper titled “PPAPlace: Differentiable Cross-Stage Objectives ...
Semiconductor Engineering

Ferroelectric Tuning Reduces Optical-Interconnect Stalls In LLM Training (Georgia Tech)

Researchers from Georgia Institute of Technology published a technical paper titled “Thermal Tuning Overhead in Wafer-Scale ...