EDN

High-level synthesis package speeds design

The Synphony HLS high-level synthesis package integrates M-language and model-based synthesis and is said to yield up to 10 times higher design and verification productivity than traditional RTL flows ...
Electronic Design

In Adding Control-Logic Support, A High-Level Synthesis Tool Goes Full Chip

High-level synthesis (HLS), or the notion of synthesizing a design into RTL from a higher level of abstraction, has been gaining currency among design teams. For some time now, there have been ...
Electronic Design

High-Level Synthesis Drives Next-Gen Edge AI Accelerators

Insight into high-level synthesis (HLS). Advantages of using HLS with AI acceleration. All things in your life are getting smarter. From the vehicles that will move you around, to the house you live ...
Semiconductor Engineering

Ensure Equivalence Of Synthesizable C++/SystemC Designs Against Generated/Handwritten RTL

High-level synthesis (HLS) is a design flow in which design intent is described at a higher level of abstraction than RTL, such as in SystemC/C++ or MATLAB. HLS tools are expected to synthesize this ...
Semiconductor Engineering

LLMs In The High-Level Synthesis Design Flow

A new technical paper titled “Are LLMs Any Good for High-Level Synthesis?” was published by researchers at University of Arizona. Abstract “The increasing complexity and demand for faster, ...
EDN

Synthesis needs to change to serve modern chip design

As EDA tools evolve, the resulting products try to increase automation. Unfortunately, the last great advance was from schematics to language-based design starting with the first synthesis tools in ...